Now a day’s reversible logic is an attractive research area due to its low power consumption in the area ofVLSI circuit design. The reversible logic gate is utilized to optimize power consumption by a feature ofretrieving input logic from an output logic because of bijective mapping between input and output. In thismanuscript, we design 4:2 and 5:2 reversible compressor circuits using a new type of reversible gate. Inaddition, we propose new gate, named as inventive0 gate for optimizing a compressor circuit. The utility ofthe inventive0 gate is that it can be used as full adder and full subtraction with low value of garbageoutputs and quantum cost. An algorithm is shown for designing a compressor structure. The comparativestudy shows that the proposed compressor structure outperforms the existing ones in terms of garbageoutputs, number of gates and quantum cost. The compressor can reduce the effect of carry (Produce fromfull adder) of the arithmetic frame design. In addition, we implement a basic reversible gate of MOStransistor with less number of MOS transistor count.
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