FPGA Implementation Of Reconfigurable Address Generator Of Deinterleaver For WiMAX Applications

摘要

WiMAX (Worldwide interoperability for Microwave Access) is a technology used to provide wireless internet connection over 30 miles. In order to increase the security strength in wireless internet, interleaving and deinterleaving is performed in transmitter and receiver receptively. The block deinterleaver is one of the deinterleaving methods which takes less computation time and consumes less power. But the floor function presents in the address generator increase the hardware complexity of deinterleaver. In addition conventional LUT-based technique is found to be unattractive because it increases the computation time and inefficient in terms of resource utilization. Besides different modulation schemes employ different interleaving patterns. Thus a mathematical algorithm for address generator which eliminates the floor function of deinterleaver is developed and the same address generator is made reconfigurable to support three modulation techniques such as 16-QAM, 64-QAM and QPSK for WiMAX applications.