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首页> 外文期刊>International Journal of Information Technology >The Excess Loop Delay Calibration in a Bandpass Continuous-Time Delta Sigma Modulators Based on Q-Enhanced LC Filter
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The Excess Loop Delay Calibration in a Bandpass Continuous-Time Delta Sigma Modulators Based on Q-Enhanced LC Filter

机译:基于Q增强LC滤波器的带通连续时间Delta Sigma调制器中的多余环路延迟校准

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The Q-enhanced LC filters are the most used architecture in the Bandpass (BP) Continuous-Time (CT) Delta-Sigma (ΣΔ) modulators, due to their: high frequencies operation, high linearity than the active filters and a high quality factor obtained by Q-enhanced technique. This technique consists of the use of a negative resistance that compensate the ohmic losses in the on-chip inductor. However, this technique introduces a zero in the filter transfer function which will affect the modulator performances in term of Dynamic Range (DR), stability and in-band noise (Signal-to-Noise Ratio (SNR)). In this paper, we study the effect of this zero and we demonstrate that a calibration of the excess loop delay (ELD) is required to ensure the best performances of the modulator. System level simulations are done for a 2ndorder BP CT (ΣΔ) modulator at a center frequency of 300MHz. Simulation results indicate that the optimal ELD should be reduced by 13% to achieve the maximum SNR and DR compared to the ideal LC-based ΣΔ modulator.
机译:Q增强型LC滤波器是带通(BP)连续时间(CT)Δ-Σ(ΣΔ)调制器中最常用的架构,原因是它们具有:高频工作,比有源滤波器高的线性度和高品质因数通过Q增强技术获得。该技术包括使用负电阻来补偿片上电感器中的欧姆损耗。但是,该技术在滤波器传递函数中引入了零,这将影响调制器的动态范围(DR),稳定性和带内噪声(信噪比(SNR))性能。在本文中,我们研究了此零的影响,并证明了需要对过量环路延迟(ELD)进行校准以确保调制器的最佳性能。系统级仿真是针对中心频率为300MHz的二阶BP CT(ΣΔ)调制器进行的。仿真结果表明,与理想的基于LC的ΣΔ调制器相比,应将最佳ELD降低13%,以实现最大的SNR和DR。

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