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Comparison of Existing Multipliers and Proposal of a New Design for Optimized Performance

机译:现有乘数的比较和优化性能的新设计的建议

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Multipliers are inevitable components in digital system design and embedded applications. The performance parameters of multipliers play a vital role in maximizing the efficiency of these applications. Different algorithms have been proposed for improving the performance parameters of multipliers. This paper formulates a comparative study of some of the well known existing multipliers and thereafter proposes a robust design. The multiplier with a carry-look-ahead adder has shown a better performance over the multiplier with a ripple adder in terms of gate delays.
机译:乘法器是数字系统设计和嵌入式应用中不可避免的组件。乘法器的性能参数在最大限度地提高这些应用的效率方面起着至关重要的作用。已经提出了用于改善乘法器性能参数的不同算法。本文对一些已知的现有乘法器进行了比较研究,然后提出了一种稳健的设计。就门延迟而言,具有进位超前加法器的乘法器比具有纹波加法器的乘法器具有更好的性能。

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