Soft-Core Processor Design for Sensor Networks Nodes

摘要

Existing sensor networks are using off-the-shelve general-purpose processor in their nodes design to support them with the processing capability that required by different applications. However, the architectures of these processors are not optimized for the needs of sensor networks applications. Since the general-purpose processors have a design that support all types of applications, these processors are generally have high cost and consume large power. Supporting sensor nodes with soft-core processor will optimize the processor architecture to match the needs of the sensor networks applications. Therefore, the processor will support only those hardware components required by the target application and that will reduce the processor power consumption. In addition, the soft-core processor can be integrated on a chip with the other hardware components required to develop the sensor node and that will reduce the size of the Printed Circuit Board (PCB) required to implement the sensor node and hence, reduce the sensor node cost. In this paper, we are presenting the design for the soft-core processor using Field Programmable Gate Array (FPGA) technology. The soft-core processor, instructions set, core testing, and performance are presented in this work.