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A Prototype System for Many-Core Architecture SMYLEref with FPGA Evaluation Boards

机译:具有FPGA评估板的多核架构SMYLEref的原型系统

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Nowadays, the trend of developing micro-processor with hundreds of cores brings a promising prospect for embedded systems. Realizing a high performance and low power many-core processor is becoming a primary technical challenge. Generally, three major issues required to be resolved includes: 1) realizing efficient massively parallel processing, 2) reducing dynamic power consumption, and 3) improving software productivity. To deal with these issues, we propose a solution to use many low-performance but small and very low-power cores to obtain very high performance, and develop a referential many-core architecture and a program development environment. This paper introduces a many-core architecture named SMYLEref and its prototype system with off-the-shelf FPGA evaluation boards. The initial evaluation results of several SPLASH2 benchmark programs conducted on our developed 128-core platform are also presented and discussed in this paper.
机译:如今,开发具有数百个内核的微处理器的趋势为嵌入式系统带来了广阔的前景。实现高性能和低功耗的多核处理器正成为主要的技术挑战。通常,需要解决的三个主要问题包括:1)实现高效的大规模并行处理,2)降低动态功耗,以及3)提高软件生产率。为了解决这些问题,我们提出了一种解决方案,该解决方案使用许多低性能但小巧且非常低功耗的内核来获得非常高的性能,并开发了具有参考意义的多核体系结构和程序开发环境。本文介绍了一个名为 SMYLEref的多核架构及其带有现成FPGA评估板的原型系统。本文还介绍并讨论了在我们开发的128核平台上进行的几个SPLASH2基准测试程序的初步评估结果。

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