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A power-efficient digital amplifier using input dependent bit flipping for portable audio systems

机译:使用便携式音频系统的依赖于输入的位翻转的高效数字放大​​器

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摘要

This paper presents a power-efficient fully digital amplifier (FDA) with low-power consumption for portable audio systems. Input dependent bit flipping (IDBF) technique is proposed and employed in the FDA to reduce the switching rate of the 1-bit delta-sigma modulator (DSM) compared to conventional 1-bit DSM-based FDAs, thus lowering pulse repetition frequency (PRF). Experimental results verified on FPGA demonstrate that the PRF with IDBF is the range between 426 KHz and 466 KHz depending on input amplitude, whereas the PRF without IDBF is the range between 722 KHz and 1020 KHz. Therefore, the proposed amplifier significantly improves power efficiency without serious degradation of the signal-to-noise ratio (SNR)1.
机译:本文提出了一种用于便携式音频系统的低功耗,高能效的全数字放大器(FDA)。与传统的基于1位DSM的FDA相比,提出了与输入有关的位翻转(IDBF)技术,并在FDA中采用该技术来降低1位Δ-Σ调制器(DSM)的开关速率,从而降低了脉冲重复频率(PRF) )。在FPGA上验证的实验结果表明,具有IDBF的PRF在426 KHz和466 KHz之间,取决于输入幅度,而没有IDBF的PRF在722 KHz和1020 KHz之间。因此,所提出的放大器在不严重降低信噪比(SNR)1的情况下显着提高了功率效率。

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