A Case for the Scope of Reconfigurable Transistors in Computer Architecture

摘要

Reconfigurable field effect transistors (RFET) is expected to offer a lower transistor count and decreased area consumption compared to conventional CMOS. While the semiconductor industry is moving towards sub-lOnm transistor technologies, silicon nanowires are considered a major evolutionary step for FinFET technology due to their outstanding electrostatic control over the channel. The first use of SiNW for implementing reconfigurable transistors was demonstrated in 2012. However, a key advantage of SiNW RFET is logic reconfigurability at the device level. Conventional CMOS relies on fixed PMOS and NMOS transistors that respectively operate p- (holes being the charge carriers) and n-type (electrons carrying charge) channels. A single SiNW RFET device, however, can be configured to operate with n- or p-type channels at runtime. This fine-grain reconfigurability enables the circuit to realize multiple functionalities depending on the configuration of the devices.