Mapping full-systolic arrays for matrix product on XILINX's XC4000(E,EX) FPGAs

摘要

Matrix product is a compute bound problem that can be efficiently handled by elementary systolic algorithms. From a theoretical point of view, most of the algorithms are very simple and sometimes even trivial. However, the task of designing efficient implementation on a fixed-connection network, such as on FPGA where resources are very limited, has been more demanding, and sometimes quite tedious. The objective of this paper is twofold: we first describe a full-systolic algorithm for matrix product that has the merit over its existing counterparts, to require no preloading of input data into elementary processors (Eps) and generates output data only form boundary EPs.