A Filter Bank Mismatch Calibration Technique for Frequency-Interleaved ADCs

摘要

The filter bank mismatch of analog analysis filters in frequency-interleaved ADCs (FI-ADCs) degrades the system's spurious-free dynamic range (SFDR) significantly. In this paper, a calibration approach for compensating such mismatch is presented. By modeling the parameter mismatches in the analysis filters, the filter bank mismatch compensation is divided into a coarse trimming mode and a fine-tuning mode. After the coarse trimming mode by trimming the resistors and capacitors in analog domain, the fine-tuning mode by updating coefficients of synthesis filters is further carried out in digital domain to achieve high-precision calibration. A design example of 10 GS/s 8-bit four-channel FI-ADC is built in MATLAB. The simulation results show that 25-tap synthesis filters could satisfy the reconstruction requirement of 8-bit ADC. The proposed calibration technique improves the SFDR to 51 dB, compensating the filter mismatch effectively.