Coarse Grained ADRES Based MIMO-OFDM Transceiver with New Radix-{2}^{5} Pipeline FFT/IFFT Processor

摘要

Software defined radio (SDR) is an adaptive radio that sense and adjust the operating parameters based on the environment. MIMO-OFDM technique based SDR transceiver is an advanced technique over the conventional radio system in terms of complex adaptation strategies. To improve the performance of the OFDM architecture, a new algorithm was developed for FFT/IFFT unit called the radix-({2}^{5}) modified booth encoding algorithm. This paper describes the system-on-chip (SoC) implementation of MIMO-OFDM transceiver architecture for SDR. This architecture design is based on the concept of reusing the same software and hardware modules to handle different algorithms with the help of dynamic reconfigurable system. It provides a greater flexibility in the operation of reconfigurable system; also it can able to add new abilities into it, without adding additional hardware. The SoC functional verification of this transceiver circuit was carried out in the Xilinx Virtex 5 FPGA, on top of the ADRES reconfigurable SoC architecture. The result shows that the proposed method provides a greater performance by two times than the previous works. It had provided a high throughput (2.4 Gsample/s) with low latency (2.941 ns) and less area utilization (27k logic gates).