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Accumulator size minimization for a fast cumulant-based motion estimator

机译:基于累加器的快速运动估算器的累加器尺寸最小化

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摘要

The implementation of fast dedicated processor for block matching motion estimation based on cumulants matching criteria implies the optimization of all of its components. Special care should be spent with the multiply-accumulate unit that is the core of many digital signal processing systems. Therefore, its optimization may be of outmost importance, specially if a significative number of such units are present in the platform. In this paper, the minimization of the size of one such unit is provided for a specific application, although the results have relevance in other scenarios.
机译:基于累积量匹配标准的用于块匹配运动估计的快速专用处理器的实现意味着其所有组件的优化。应该特别注意乘法累加单元,它是许多数字信号处理系统的核心。因此,其优化可能至关重要,特别是如果平台中存在大量此类单元时。在本文中,为特定应用提供了一个这样的单元的最小化,尽管结果在其他情况下也具有相关性。

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