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A CMOS Spiking Neuron for Brain-Inspired Neural Networks With Resistive Synapses and In Situ Learning

机译:带有脑突触和原位学习功能的脑神经网络的CMOS尖峰神经元。

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Nanoscale resistive memory devices are expected to fuel dense integration of electronic synapses for large-scale neuromorphic systems. To realize such a brain-inspired computing chip, a compact CMOS spiking neuron that performs learning and computing while driving a large number of resistive synapses is desired. This brief presents a novel leaky integrate-and-fire neuron design that implements the dual-mode operation of current integration and synaptic drive, with a single operational amplifier (opamp) and enables learning with crossbar resistive synapses. The proposed design was implemented in a 0.18- CMOS technology. Measurements show neuron's ability to drive a thousand resistive synapses and demonstrate associative learning. The neuron circuit occupies a small area of 0.01 mm and has an energy efficiency value of 9.3 pJ/spike/synapse.
机译:纳米电阻存储器件有望为大规模神经形态系统促进电子突触的密集集成。为了实现这种受大脑启发的计算芯片,需要一种紧凑的CMOS尖峰神经元,该神经元在驱动大量电阻性突触的同时执行学习和计算。本简介介绍了一种新颖的泄漏积分和发射神经元设计,该器件采用单个运算放大器(opamp)来实现电流积分和突触驱动的双模式操作,并能够通过交叉电阻式突触进行学习。拟议的设计采用0.18- CMOS技术实现。测量显示神经元具有驱动一千个抵抗性突触并展示联想学习的能力。神经元电路占据0.01毫米的小面积,其能量效率值为9.3 pJ /峰值/突触。

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