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首页> 外文期刊>Circuits and Systems II: Express Briefs, IEEE Transactions on >High Input Impedance Low-Noise CMOS Analog Frontend IC for Wearable Electrocardiogram Monitoring
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High Input Impedance Low-Noise CMOS Analog Frontend IC for Wearable Electrocardiogram Monitoring

机译:高输入阻抗低噪声CMOS模拟前端IC,可穿戴心电图监控

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摘要

This brief presents a CMOS analog frontend (AFE) IC with high input impedance low input-referred noise, which for wearable electrocardiogram monitoring. The IC has three main parts, pseudo-differential chopper-stabilized instrumentation amplifier, switched capacitor filter, and low-power continuous-time Sigma Delta modulator. The pseudo-differential structure with chopper stabilization improves the input impedance, input-referred noise and chip area. Notably, we propose a new type of negative capacitor circuit to further boost the input impedance. Furthermore, the auto-zero technique is applied to the ripple reduction loop for suppressing the second harmonic ripple and maintain operation throughout the loop cycle. A dc servo loop suppresses the electrode dc offset. In 0.18 mu m CMOS process, the proposed AFE IC occupies an active area of 0.99 mm(2), consumes 5.8/46.6 mu A from a 1.8 V supply, and achieves an input impedance above 2 G Omega, a CMRR of 102 dB and a PSRR of 72 dB.
机译:本简介介绍了具有高输入阻抗的CMOS模拟前端(AFE)IC,用于可穿戴心电图监测的高输入噪声。 IC有三个主要部件,伪差分斩波仪稳定仪表放大器,开关电容滤波器和低功耗连续时间Sigma Delta调制器。具有斩波稳定的伪差分结构改善了输入阻抗,输入引用的噪声和芯片区域。值得注意的是,我们提出了一种新型的负电容器电路,以进一步提高输入阻抗。此外,将自动零技术应用于纹波减速回路,以抑制第二谐波纹波并在整个环路周期中维持操作。直流伺服环路抑制电极DC偏移。在0.18 mu m cmos工艺中,所提出的AFE IC占据0.99mm(2)的有源面积,消耗1.8 V供应的5.8 / 46.6亩,并实现2g Omega的输入阻抗,102 dB的CMRR和PSRR为72 dB。

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