THREE-DIMENSIONAL INTEGRATION IN MICROELECTRONICS: MOTIVATION, PROCESSING, AND THERMOMECHANICAL MODELING

摘要

Three-dimensional integration (3D-I) of multiple layers of active devices into a single chip is opening up opportunities for disruptive microelectronic, optoelectronic, and microelectromechanical systems. Integrated circuit (IC) designers are driving 3D-I for new products, which in turn is providing opportunities in process technology and modeling. This article reviews the status of 3D-I and describes some research opportunities for both process engineers and modeling and simulation engineers. The opportunities discussed center around “stacking” and interconnecting multiple active and/or passive layers or strata of traditional planar designs into “hyperfunctional” 3-D systems. The focus is on electrical 3D-ICs, using BCB as the adhesive to bond wafers, and copper-based, through-silicon-vias or through-strata-vias (TSVs) for interconnection. However, much of the material applies to other approaches to 3D-I and other 3-D systems. Both recently established methods and advanced research efforts are discussed for process technology and thermomechanical modeling and simulation of Cu-based TSVs and BCB-based bonding.View full textDownload full textKeywordsBCB bonding, Grain boundary migration, Grain continuum modeling, Three-dimensional integration, Through-silicon-viasRelated var addthis_config = { ui_cobrand: "Taylor & Francis Online", services_compact: "citeulike,netvibes,twitter,technorati,delicious,linkedin,facebook,stumbleupon,digg,google,more", pubid: "ra-4dff56cd6bb1830b" }; Add to shortlist Link Permalink http://dx.doi.org/10.1080/00986440801930302