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Effect of planarization of the bottom superconducting yttrium-barium-copper-oxide layer in the multilayer structure

机译:多层结构中底部超导钇钡钡铜氧化物层平面化的影响

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摘要

YBCO/YSZ/SiO/sub 2//YSZ/YBCO multilayer structures have been successfully grown on single crystal YSZ substrates. The YBCO superconducting layers (300 nm thick) were deposited using pulsed laser deposition (PLD). The YSZ layers (300 nm thick) which are biaxially aligned were deposited using PLD and ion beam assisted deposition (IBAD). A thick silicon dioxide layer (2-4 microns) was sandwiched between the YSZ layers to meet the low dielectric constant requirement for multichip module applications. However, if the bottom superconducting layer was patterned into interconnecting lines as required in device applications, the surface of the YSZ/SiO/sub 2//YSZ on top of the patterned bottom superconducting layer had a roughness of about 500 nm. As a result, the top YBCO was no longer superconducting. Thus, planarization of the patterned bottom superconducting layer becomes a key issue. We have developed a "fill-in and lift-off" process to fill the gap between the patterned bottom superconducting lines with YSZ, As a result, we were able to reduce the surface roughness of the bottom YBCO layer to about 10 nm so the top layer was superconducting with a critical temperature of 87 K.
机译:YBCO / YSZ / SiO / sub 2 // YSZ / YBCO多层结构已成功地在单晶YSZ衬底上生长。使用脉冲激光沉积(PLD)沉积YBCO超导层(300纳米厚)。使用PLD和离子束辅助沉积(IBAD)沉积双轴取向的YSZ层(300nm厚)。在YSZ层之间夹有厚的二氧化硅层(2-4微米),以满足多芯片模块应用对介电常数的低要求。但是,如果根据设备应用的需要将底部超导层图案化为互连线,则图案化的底部超导层顶部的YSZ / SiO / sub 2 // YSZ的表面的粗糙度约为500 nm。结果,最高的YBCO不再超导。因此,图案化的底部超导层的平坦化成为关键问题。我们开发了一种“填充和剥离”工艺,用YSZ填充图案化的底部超导线之间的间隙,结果,我们能够将底部YBCO层的表面粗糙度降低到大约10 nm,因此顶层是超导的,临界温度为87K。

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