首页> 外文期刊>Applied Physics Letters >Capacitance transient study of the influence of iron contamination on the electrical characteristics of silicon grain boundaries
【24h】

Capacitance transient study of the influence of iron contamination on the electrical characteristics of silicon grain boundaries

机译:铁污染对硅晶界电特性影响的电容瞬态研究

获取原文
获取原文并翻译 | 示例
           

摘要

The influence of iron contamination on the electrical characteristics of an interfacial grain boundary created by bonding two (110)/(100) silicon wafers was examined by a capacitance transient technique. Compared with the clean sample, iron contamination increases both the density of boundary states (by at least three times) and the zero-bias barrier height (by 70 meV), while dramatically reducing by two orders of magnitude the electron/hole capture cross-section ratio. These results suggest that a larger barrier will be sustained at the iron contaminated boundary under low injection condition, thereby enabling more effective minority carrier collection and associated enhanced recombination activity.
机译:通过电容瞬变技术研究了铁污染对通过键合两个(110)/(100)硅片而产生的界面晶界电特性的影响。与纯净样品相比,铁污染不仅使边界态的密度增加了至少三倍,而且使零偏压势垒高度增加了70 meV,同时使电子/空穴俘获跨度降低了两个数量级。截面比。这些结果表明,在低注入条件下,在铁污染的边界处将维持更大的屏障,从而使更有效的少数载流子收集和相关的重组活性得以增强。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号