Experimental examination of tunneling paths in SiGe/Si gate-normal tunneling field-effect transistors

摘要

The benefits of a gate-normal tunneling architecture in enhancing the on-current and average sub-threshold swing of tunneling field-effect transistors were scrutinized in experiment through careful physical analysis of a Si_(0.50)Ge_(0.50)/Si heterostructure. In accordance with theoretical predictions, it is confirmed that the on-current is governed by line tunneling scaling with the source-gate overlap area of our devices. Our analysis identifies the early onset of parasitic diagonal tunneling paths as most detrimental for a low average subthreshold swing. By counter doping the channel, this onset can be shifted favorably, permitting low average subthreshold swings down to 87 mV/dec over four decades of drain current and high on-off current ratios exceeding 10~6.