Efficient PEEC-Based Simulations using Reluctance Method for Power Electronic Applications

摘要

This paper presents a partial element equivalent circuit (PEEC)-based solver that has been accelerated to exploit the massively parallel structure of graphics processing unit (GPU) technology, in order to employ a reluctance-based method in an efficient way. A grouping algorithm is also presented which makes reluctance calculation efficient, suitable for GPUs, and feasible even for very large problems. It has been shown that by using the reluctance method, the coefficient matrix in the system equation can be safely sparsified whilst the required accuracy is maintained. Because the calculation of the reluctance matrix includes matrix inversion, which is a task with high computational complexity, GPUs as cooperative units are utilized to reduce computational costs by taking advantage of parallelism. Two test models have been simulated and analyzed to benchmark the solver, and the results have been compared with the previously developed solver. Furthermore, analyzing the results reveals that the reluctance method makes it possible to use a considerably sparser system and thereby solve large problems by decreasing the memory demands and the solution time. It is also proven that the solution is reliable and accurate, whereas the problem has become noticeably smaller.