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首页> 外文期刊>Acta Physica Polonica >Barriers in Miniaturization of Electronic Devices and the Ways to Overcome Them - from a Planar to 3D Device Architecture
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Barriers in Miniaturization of Electronic Devices and the Ways to Overcome Them - from a Planar to 3D Device Architecture

机译:电子设备小型化的障碍及其克服方法-从平面到3D设备架构

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摘要

We witness a new revolution in electronic industry - a new generation of integrated circuits uses as a gate isolator HfO_2. This high-k oxide was deposited by the atomic layer deposition technique. The atomic layer deposition, due to a high conformality of deposited films and low growth temperature, has a large potential to be widely used not only for the deposition of high-k oxides, but also of materials used in solar cells and semiconductor/organic material hybrid structures. This opens possibilities of construction of novel memory devices with 3D architecture, photovoltaic panels of the third generation and stable in time organic light emitting diodes as discussed in this work.
机译:我们见证了电子工业的新革命-新一代集成电路用作栅极隔离器HfO_2。通过原子层沉积技术沉积该高k氧化物。由于沉积膜的高保形性和较低的生长温度,原子层沉积具有很大的潜力,不仅可以广泛用于高k氧化物的沉积,而且可以广泛用于太阳能电池和半导体/有机材料中的材料混合结构。这为构建具有3D架构的新型存储设备,第三代光伏面板和如本文所述的及时稳定的有机发光二极管提供了可能性。

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