基于ARM+CPLD的多通道数据采集系统研究

摘要

文章开发了基于ARM和CPLD的多通道数据采集系统，该数据采集系统利用CPLD可编程逻辑器件的模块化设计思想和先入先出（FIFO）芯片作为缓冲存储器，解决了A/D转换器的采样速率和CPU的工作时钟频率不匹配的问题，避免了数据丢失等问题，提高了CPU效率。文章运用网络通讯使得数据传输速度更快，更加稳定。%The paper has designed multi-channel data acquisition system based on ARM and CPLD. It has used CPLD programmable logic device modular design and ifrst-in ifrst-out (FIFO) memory buffer chip, which not only has solved the problem that the A/D converter sampling rate does not match with CPU operating clock frequency, but also has avoided data loss and other issues and has improved the CPU efifciency. And the use of network communication enables data transfer faster and more stable in this article.