基于模块局部可重构FIR滤波器设计

摘要

A reconfigurable symmetric FIR filter using dynamic partial reconfiguration on the Xilinx Virtex-4 FPGA is designed in this paper,which has high efficiency addresses area and flexibility allows dynamically inserting or removing the partial modules.It has an advantage on small configured slice,shorter configuration time and high speed flexibility over the conventional FIR filters design.%介绍了一种使用动态局部重构技术设计可重构FIR数字滤波器的方法,是一种注重面积效率高、灵活性强,允许动态插入或删除局部模块的方法,并在Xilinx Virtex-4 FPGA上实现.这种设计方法比传统的FIR滤波器的设计方法具有占用资源更少、重构时间更短、高速灵活性等优点.