基于MLVDS高速半双工数据传输设计

摘要

Aiming at the low rate and low reliability of the existing problems of the application of MLVDS half du -plex data transmission , a design of high speed and high reliability of half duplex data transmission were put forward . Taking MLVDS as a data transfer interface and Spartan-6 FPGA chip as logic implementations , the CRC and parity mode was added on to improve transmission the transmission link layer reliability .The overall design scheme and the realization method of half duplex control mode are introduced in detail , and the design of the system is simulated and tested.Finally, the experimental results of the design to verify the advantages of the transmission design .%针对目前应用MLVDS半双工模式传输数据存在速率低和可靠性低的问题，提出了一种高速且高可靠性半双工数据传输的设计。设计中以MLVDS作为数据传输接口，Spartan－6 FPGA作为逻辑实现芯片，在传输链路层上增加了CRC和奇偶校验方式提高传输可靠性。对总体设计方案和半双工控制模式的实现方法进行了详细介绍，并对设计进行了仿真和实际测试。最后给出了设计的试验结果，验证了本设计的传输优势。