Since the communication bandwidth is widened increasingly, a design of protocol converter based on FPGA and MPC875 for multiple interfaces and E1 is proposed to solve the problem that the low-speed devices can not be connected to high-speed E1 lines. The hardware functional block diagram and the selection method of major components are provided. The dispatching method of multi-interface data, empty timeslot disposal strategy, FPGA structure design and software design flow are elaborated. Through the realization of protocol conversion for RS 232, RS 449, V. 35 and E1, this design is proved to be feasible.%针对通信带宽越来越高,低速设备无法连接到高速的E1线路的问题,提出了一种基于可编程逻辑器件FPGA、嵌入式微处理器MPC875的多路接口与E1协议转换器的设计,给出了硬件原理框图及主要元器件的选型,并对多路接口数据调度方法、空时隙处理策略、FPGA结构设计、软件设计流程进行了详细说明.通过实现RS 232,RS 449,V.35三路接口与E1的协议转换,证明该方案是可行的.
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