基于32位微处理器系统架构的 Cache 设计

摘要

With the development of the chip technology,the embedded processor catches the new opportunities,which is widely used in such fields as communication,multimedia,networking,entertain-ment,etc.The processing speed of the processor nearly increases in a certain index,while the slower processing speed of the memory becomes the major bottleneck of MCU system characteristics.Considering of balancing cost,performance and power,the cache widely is used in MCU system.In this paper,the principle of the cache is firstly described,the direct -mapping,full -associate cache and set -associate cache are compared as well.Then,the relationship between line size and hit rate is analyzed.Lastly,a cache,based on 32 bits processor architecture,is designed.%近年来随着芯片技术的发展，嵌入式微处理器迎来了新的机遇，广泛应用于通信、多媒体、网络以及娱乐等方面。处理器的处理速度发展迅速，近乎于指数增长，然而内存的处理速度增长缓慢，因此内存的存储速度成为了影响嵌入式微处理器系统性能的主要瓶颈，为了均衡成本、性能和功耗，高速缓存 Cache 广泛应用于嵌入式系统中。首先介绍 Cache 的工作原理，其次对直接映射、全关联映射、组相联映射三种策略进行比较分析，然后分析行大小与命中率的关系，最后设计一款基于32位微处理器系统架构的高速缓存 Cache。