一种新的四象限电流模式乘法器的实现∗

摘要

A novel current-mode analog multiplier is proposed in this paper,which is based on current square circuits.Compared with previous works,the major advantages of this multiplier are wider band-width,higher speed,lower power consumption and lower error.The CMOS analog multiplier is designed and simulated in 0.18μm CMOS process technology with 1.8 V power supply.Simulation results show that nonlinearity error is about 0.46%.The total harmonic distortion is about 0.89% in 10 MHz.The quiescent power consumption is only 80.72μW.As a result,it can be considered as a useful building block in inte-grated circuit.%在平方电路的基础上设计出一种新型电流模式的乘法器，用0.18μm CMOS集成工艺对电路进行 Cadence 仿真测试，结果表明，设计的电路具有高频特性好、高速、高精度、低误差、低功耗等优点.在10 MHz 下，非线性误差约为0.46%，总谐波失真约为0.89%，总功耗约为80.72μW.从而该乘法器可以作为一个基本模块在电路设计中得到广泛的应用.