A novel current-mode four-quadrant CMOS analog multiplier/divider

摘要

This paper presents, a new current mode four-quadrant CMOS analog multiplier/divider based on dual translinear loops. Compared with the previous works this circuit has a simpler structure resulting in lower power consumption and higher frequency response. Simulation results, performed using HSPICE with 0.25 μm technology, confirm performance of the proposed circuit.