一种基于 DDFS 技术的曼彻斯特码时钟提取及解码电路

摘要

In order to avoid synchronization header and phase ambiguity due to clock jitter in conditional Manchester decoder , a novel clock extraction and decoding circuit is proposed . Code rate and phase is attained respectively through coarse synchronization and accurate synchronization by using DDFS technology . The simulation and experiment results show that the decoder can extract the clock accurately and decode the data correctly when the SNR is greater than 2.4 dB .%为解决现有曼彻斯特解码中需要加同步头、时钟抖动带来的相位模糊等问题，提出一种新型曼彻斯特解码时钟提取和解码电路.该系统采用 DDFS （直接数字频率合成）技术，通过粗同步、细同步分别进行捕获（测量码率）和相位跟踪（锁相）.仿真和实验结果表明，该系统在信噪比大于2.4 dB 下可以准确的提取时钟和正确解码.