Hardware Software Co-synthesis involves determining the hardware and software architectures for an application. This process involves selection of processing elements, mapping application parts to those process- ing elements followed by scheduling. Various heuristic based co-synthesis algorithms have been proposed but many of them are limited by simple architecture and non-pipelined implementations. In this paper we present a new processor allocation and pipelined algorithm which can be used for hardware software co-synthesis. The al- gorithm iteratively selects processing elements based on performance improvement and then allocates tasks and creates pipeline stages. Task allocation and pipelining processes are interleaved which helps to remove redun- dant pipeline stages. The algorithm is also applied to an example task graph and results are discussed.%在实际应用中,软硬件协同设计过程包含了软硬件结构的确定,这一确定过程具体包括了处理器件的选择、任务到元件的映射和任务时间调度的安排。现存有很多基于协同设计的启发式算法,但其中的大部分只能应用于简单的结构和非流水化的应用。提出了一种能够应用于软硬件协同设计的处理器分配和流水化处理的新方法。这种方法能够根据元器件对系统性能的提高程度反复选择器件,据此分配任务、创建流水平台,并且能够消除冗余平台。
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