基于FPGA的高速数据串口采集系统设计

摘要

In order to achieve high-speed data acquisition and analysis,a high-speed data acquisition system is designed by adopting serial port transmission technique and using FPGA as the central logic control module.The design uses the AD9233 analog-to-digital conversion chips and CycloneII series FPGA chip.The design of the FPGA module adopts the Verilog-HDL.Software design and timing simulation are achieved in QuartusII and ModelSim.The system is verified to have high stability,high real-time performance and high precision in GPS signal acquisition experiment.%为了实现对高速数据的采集和分析,设计了一种以FPGA为核心逻辑控制模块和串口传输技术的高速数据采集系统.设计采用AD9233模数转换芯片和CycloneII系列的FPGA芯片.FPGA模块的设计采用Verilog HDL硬件描述语言实现,在QuartusII和ModelSim工具中实现软件设计和时序仿真验证.GPS信号的采集实验验证了该系统具有稳定性高、实时性强和准确度高等优点.