The fast Fourier transform(FFT) is frequently used in various fields such as computer tomography, speech recognition and image processing. As the area of computer applications has been broadened, the quantity of data to be transformed has greatly increased. Parallel FFT is an important way of fast transformation. Up to now, several FFT chips have been developed by WSI for small size of data to be transformed. This paper describes a parallel FFT architecture consisting of FFT chips for a large number of data. The performance of parallel architecture is discussed in terms of the total area and the execution time. We also propose a fault tolerance interconnection for FFT butterfly network by considering the complexity of the number of primitive cells.%快速傅立叶变换(FFT)在计算机层析影象技术,语音识别,图象处理等领域得到了广泛的应用.随着计算机应用的发展,越来越需要对大规模的数据进行变换.并行FFT是完成快速数据变换的一种方法.本文提出一种由小规模FFT芯片构成并行FFT的方法,可用于大规模数据的变换,并对其并行结构的面积和执行时间进行了探讨,还提出了具有容错功能的并行FFT网络.
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