低相位噪声10次倍频器研究

摘要

A 10-fold frequency multiplier with Low phase noise has been designed and manufac-tured. It is the 5-fold multiplieris combined with the 2-fold multiplier, the outputpower is more than 10dBm at 1GHz when the input power is about 0dBm at 100MHz, the suppression of spurs is less than-55dB. The designideas,tuningmethods and measured results of this multiplier are presented in this pa-per.%研制了低相位噪声10次倍频器。采用了5、2次倍频级联方法，使倍频器在100MHz/0dBm信号输入下，输出1GHz/10dBm信号，杂散小于<-55dB。介绍了倍频器的设计思路、调试方法和测试结果等。