基于NiosⅡ软核处理器的步进电机接口设计

摘要

NiosⅡ软核处理器是Altera公司开发,基于FPGA操作平台使用的一款高速处理器,为了适应高速运动图像采集,提出了一种基于NiosⅡ软核处理的步进电机接口设计,使用verilog HDL语言完成该接口设计,最后通过Quar-tusⅡ软件,给出了实验仿真结果。%NiosII soft core processor is developed by Ahera Corporation. It is a high-speed processor FPGA-based platform. It purpose is to adapt to the high-speed moving images collection. In this paper, an interface of the step motor based on NiosII soft core is designed. It uses the Verilog HDL language to complete the design of the interface. The articles by QuartusII software shows the simulation results.