基于FPGA的全场景试验系统主时钟终端频率校准方法

摘要

Aiming at the problem of low accuracy and insufficient stability of frequency of master clock terminal of whole-view test system, the paper presents a simple and effective method to correct frequency of OCXO ( oven con-trolled crystal oscillator) .Based on the principle of time system within FPGA( Field Programmable Gata Array) estab-lishment , the method measured the periodic deviation between OCXO and GPS through TDC ( Time to Digital Convert-er) , modified the value of period within FPGA, reaching the purpose of frequency correction.In order to reduce the impact of GPS signal jitter, the moving average filter algorithm is used to tame OCXO quickly.Simulation and experi-mental results show that the clock frequency accuracy is higher than the average 5 ×10 -10 , and the time accuracy is better than 1.8μ/h, after OCXO was tamed.%针对全场景试验系统主时钟终端的时钟源频率精度低和稳定性不足的问题,文中提出了一种简单有效的恒温晶振校准方法. 该方法基于FPGA时间系统建立的原理,通过TDC (时间数字转换器)测得的恒温晶振与GPS秒脉冲之间的周期偏差值,修改FPGA内部计数器的周期计数值,达到校准主时钟频率的目的. 为降低GPS信号抖动的影响,采用滑动平均滤波算法,实现恒温晶振的快速驯服. 通过仿真和试验测试,驯服后主时钟平均频率精度高于5 ×10 -10 ,守时精度优于1.8μ/h.