STA400TEP芯片在模拟电路BIT设计中的应用研究

摘要

The testing of analog signal of VLSI is a key and difficult point. IEEEH49. 4 standard for a mixed - signal test bus and STA400TEP mixed-signal boundary scan device were introduced. The application of STA400TEP in the BIT of analog circuit was researched. A method of boundary scan architecture inserting was proposed based on sub-networks tearing fault diagnosis. The method was verified by an experiment on a driving circuit. Experimental results indicate that the inserting of STA400TEP can realize the controllability and observability of PCB and fix the position of faults.%在大规模集成电路中,模拟信号的测试是一个重点和难点;介绍了IEEE1149.4混合信号测试总线标准和支持IEEE1149.4 标准的STA400TEP边界扫描芯片,对STA400芯片在模拟电路机内测试中的应用进行了研究,提出了一种基于子网络撕裂诊断法的边界扫描结构置入的测试性设计方法,并以某驱动电路为研究对象对此方法进行了实验验证,实验结果表明STA400TEP的置入能够实现电路板的可观性和可控性,能够准确地将故障定位到子网络中.