Surface planarity is of paramount importance in microelectronics. Chemical Mechanical Polishing (CMP) is the most viable approach to address the planarity issues during the fabrication of advanced semiconductor devices. With the integration of copper as interconnect and low k materials as dielectric, the CMP community is facing an ever increasing demand on reducing defectivity without scarifying production throughput. Key issues in CMP today include reduction of surface defectivity and enhancement of planarization efficiency. More specifically, the polished surface should be free of defects such as scratches, pits, corrosion spots, and residue particles. To accomplish these goals, we have investigated a wide range of pathways including reduction of oversized particles,use of unique abrasives such as functionalized nanoparticles, and development of polishing solution without abrasive particles.In this presentation, some fundamental aspects of the CMP process will be given first.Several academic and industrial examples will be used to illustrate the issues and challenges during the implementation of various slurry designs into the CMP processes.
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