A Low-cost and High Efficiency Architecture of AES Crypto-engine

摘要

The growing market of WPAN has led to an increasingdemand of security measures and devices forprotecting the user data transmitted over the openchannels.Advanced Encryption Standards(AES)isthe basic security approach for WPAN.To meet thelow cost,low power feature and high security demandof WPAN,a low cost,high efficient AES coreis proposed in this paper.To achieve low cost,methods of integration and resource sharing are usedin designing a very low-complexity architecture,especially in(inverse)byte substitution(inv)SubBytes)modules and(inverse)mix column(inv)MixColumn)modules,etc.Further more,AESEncryptor and Decryptor is integrated into a fullfunctional crypto-engine.This very low-cost andhigh efficiency AES core of IEEE 802.15.4-2006 isdesigned and emulated on Xilinx FPGA.Simulationresults show that this kind of design can be used inresource critical applications,such as smart card,PDA and mobile phones.