To reduce design errors in process control logic and decrease FAT and SAT debugging workload,and improve automatic design quality and safety reliability of project further,the design of process control logic with aiding of LabVIEW is proposed.The aided design method is expatiated through simulation of the typical deadlock phenomenon in process logic.The feasibility and effectiveness of the aided design method is validated.%为了减少过程控制逻辑的设计错误,降低FAT和SAT的调试工作量,进一步提高自控设计质量和工程项目的安全可靠性,提出了利用LabVIEW来辅助过程控制逻辑的设计,并通过仿真过程逻辑中典型的死锁现象来阐述辅助设计的方法,从而验证了该辅助设计方法的可行性及有效性.
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