基于FPGA的硬件测试电路设计

摘要

The integrated circuit technology with FPGA as the core has developed rapidly, the application of FPGA has rapidly expanded from a very narrow field of communication infrastructure to a very wide range of applications.In this paper, the design of hardware circuit testing based on FPGA is studied from two parts:software and hardware.The hardware part is mainly composed of PLL module, counter module, image stabilization circuit and decoding module.The software part uses the Quartus Ⅱ and the EDA development tool to compile and logically synthesize each module to complete the simulation test work. The program is downloaded into a PCB board for testing. The simulation test results show that the hardware circuit testing achieved the expected design function, the performance meets the design requirements.%以FPGA为核心的集成电路技术发展迅猛, 使得FPGA的应用已经从通信基础设备这一非常窄的领域迅速扩展到了非常广泛的应用领域.从软件和硬件2个部分研究设计了基于FPGA的硬件测试电路.硬件部分主要由锁相环模块、计数器模块、防抖电路模块以及译码模块组成;软件部分利用QuartusⅡ软件并结合EDA开发工具对各模块进行编译、逻辑综合, 完成仿真测试工作;通过PCB板对整个硬件电路实测.仿真及实测结果表明, 该硬件测试电路实现了预期设计功能, 各项性能满足设计要求.