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Implementing efficient 384-bit NIST elliptic curve over prime fields on an ARM946E.

机译:在ARM946E的素数字段上实现有效的384位NIST椭圆曲线。

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摘要

This thesis presents a performance evaluation of a 384-bit NIST elliptic curve over prime fields on a 32-bit ARM946E microprocessor running at 100-MHz. While adhering to the constraints of an embedded system, the following items were investigated to decrease computation time: the importance of the underlying finite arithmetic, the use of hardware accelerators, the use of memory options, and the use of available processor features.; The elliptic curve implementation utilized existing finite arithmetic C code to interface to an AiMEC Montgomery Exponentiator Core. The exponentiator core supports modular addition, modular multiplication, and exponentiation. The finite arithmetic C code also contained functions to perform operations which are not performed by the exponentiator such as non-modular multiplication, non-modular addition, and modular subtraction.; Multiple enhancements were made to the finite field arithmetic. These provided a 22% time reduction in execution time of the 384-bit elliptic curve multiplication. Enhancements included writing assembly functions, adding checks prior to performing a modular reduction, utilizing the exponentiator core only when modulus reduction was necessary, using multiplication if more than two additions are required and placing the finite arithmetic into its own library and using ARM mode. Other optimizations investigated including: cache usage, compiler options (speed vs. size), and Thumb instruction set vs. ARM instruction set provided minimal reduction, 3.6%, in the execution time.
机译:本文提出了在运行于100MHz的32位ARM946E微处理器上,主要字段上384位NIST椭圆曲线的性能评估。在遵守嵌入式系统约束的同时,对以下项目进行了研究以减少计算时间:底层有限算术的重要性,硬件加速器的使用,内存选项的使用以及可用处理器功能的使用。椭圆曲线实现利用现有的有限算术C代码与AiMEC Montgomery Expnentiator Core接口。幂运算器核心支持模块化加法,模块化乘法和求幂。有限算术C代码还包含执行幂运算器未执行的操作的功能,例如非模数乘法,非模数加法和模数减法。对有限域算法进行了多次增强。这些使384位椭圆曲线乘法的执行时间减少了22%。增强功能包括编写汇编函数,在执行模块缩减之前添加检查,仅在需要减少模数时才使用指数运算器内核,如果需要两个以上的加法则使用乘法并将有限算法放入其自己的库并使用ARM模式。研究的其他优化包括:缓存使用率,编译器选项(速度与大小)以及Thumb指令集与ARM指令集的执行时间减少了3.6%。

著录项

  • 作者

    VanAmeron, Tracy.;

  • 作者单位

    Rochester Institute of Technology.$bComputer Engineering.;

  • 授予单位 Rochester Institute of Technology.$bComputer Engineering.;
  • 学科 Engineering Electronics and Electrical.; Computer Science.
  • 学位 M.S.
  • 年度 2008
  • 页码 87 p.
  • 总页数 87
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类 无线电电子学、电信技术;自动化技术、计算机技术;
  • 关键词

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