Architecture Exploration for Low-Power Wearable Stress Detection Processor.

摘要

Personal monitoring systems can offer effective solutions for human health. These systems require sampling and processing on multiple streams of physiological signals to extract meaningful knowledge. The processing typically consists of feature extraction, data fusion, and classification stages, which require a large number of digital signal processing and machine learning kernels. In order to be used in a wearable environment, the processing system needs to be low-power, real-time and light-weight. In this thesis, we present a personalized stress monitoring processor that can meet these requirements. A dataset provided by Army Research Laboratory (ARL) that contains multi-physiological signals is used for design exploration. Various physiological features are explored to maximize stress detection accuracy using two machine learning classifiers including Support Vector Machine (SVM) and K-Nearest Neighbors (KNN).;Among different extracted features from four physiological sensors, heart rate and accelerometer features have 96.7% and 95.8% detection accuracy for SVM and KNN classifiers, respectively.;Two fully flexible and multi-modal processing hardware designs are presented that consist of feature extraction and classification algorithms using SVM and KNN for stress monitoring. We first demonstrate the ASIC post-layout implementation of both designs in 65 nm CMOS technology. The proposed SVM processor occupies 0.17 mm2 and dissipates 39.4 mW at 250 MHz. The KNN processor has an area of 0.3 mm2 and consumes 76.69 mW at 250 MHz.;Next, we explore the choice of low-power programmable embedded processors for energy-efficient processing of physiological signals for a wearable multi-modal stress detection system. The entire system consists of feature extraction and classification for all 15 participant's data, which is implemented on a number of platforms including Artix-7 FPGA, NVIDIA TK1 ARM-A15 CPU and Kepler GPU, and a domain-specific many core named Power Efficient Nano Clusters (PENC). The comparison of performance metrics among all platforms shows that PENC has the highest throughput (decision/sec) over all platforms due to existence of task-level and data-level parallelism present in its architecture. PENC improves the throughput by 4.6x and 4.05x over the Artix FPGA for the KNN and SVM implementations respectively. The experimental results also indicate that for a larger design such as KNN with 16K training data, PENC accelerator is the most energy efficient platform. For KNN implementation, PENC improves the energy efficiency by 4.7x and 268x over the FPGA and GPU, respectively. However, for the SVM implementation with 6000 support vectors as a smaller design, the FPGA improves the energy efficiency by 1.2x and 630x over the PENC and GPU, respectively. These findings suggest that the PENC manycore can be used as an energy-efficient, programmable and real-time platform for biomedical applications with large amount of data and computation-intensive parallel processing.