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Real-time synthetic aperture radar imaging: A model and design using VLSI correlators.

机译:实时合成孔径雷达成像:使用VLSI相关器的模型和设计。

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摘要

Synthetic Aperture Radar (SAR) is a two dimensional imaging system that processes reflected radar signals into an image of the reflecting object. SAR image processing is typically done using either frequency or time domain techniques. Different architectures in time domain, frequency domain and a combination of both have been studied and are summarized, compared and contrasted. However, most of the above techniques do not process the SAR data in real time to produce images.; In this research a simplified model for the time domain SAR imaging problem is presented. The model is based on the geometry of the SAR system. Using this model an expression for the phase history of the received signal is formulated. From the phase history it is shown that the range and the azimuth coordinates of a point target image can be obtained by processing the phase information during the intrapulse and interpulse period data respectively. This research also presents an algorithm for a two dimensional correlation in the time domain in order to exploit the natural parallelism to accommodate the higher computation rates necessary in time domain approaches. The algorithm requires only as many multiplier accumulators as there are non-zero elements in the correlation reference function and uses no explicit memory for its operation. It produces output at every clock cycle with a latency time of one multiply accumulate. The algorithm lends itself nicely to VLSI implementation. This research proposes a SAR architecture using these correlators to generate images in real time. A one dimensional correlator is used to process the received SAR data in the range direction and a two dimensional correlator is used to process the range correlated data in the azimuth direction. The architecture proposed has several advantages over the existing architectures such as no large memory requirements, no explicit range migration correction circuitry, efficient processing and fewer number of VLSI chips.; This research discusses the possibility of reducing the data rates by down sampling the received target azimuth phase history. It is shown that down sampling the phase history improves the spatial resolution between point targets. Down sampling and the time domain correlators help real time imaging of SAR data. The bit width requirement criterion for a given grey scale resolution at each of the processing blocks is also presented. A simulator capable of imaging point targets is also discussed.
机译:合成孔径雷达(SAR)是一种二维成像系统,可将反射的雷达信号处理为反射物体的图像。 SAR图像处理通常使用频域或时域技术来完成。已经研究并总结,比较和对比了时域,频域以及两者的组合方面的不同架构。但是,大多数上述技术不能实时处理SAR数据以产生图像。在这项研究中,提出了时域SAR成像问题的简化模型。该模型基于SAR系统的几何形状。使用该模型,可以为接收信号的相位历史制定公式。从相位历史中可以看出,通过分别在脉冲内和脉冲间数据期间处理相位信息,可以获得点目标图像的范围和方位坐标。这项研究还提出了一种时域二维相关算法,以利用自然并行性来适应时域方法中所需的更高计算速率。该算法仅需要与相关参考函数中存在非零元素一样多的乘法器累加器,并且不使用显式存储器进行运算。它在每个时钟周期产生输出,并累积一个乘法的延迟时间。该算法非常适合VLSI实现。这项研究提出了一种使用这些相关器实时生成图像的SAR体系结构。一维相关器用于在距离方向上处理接收到的SAR数据,而二维相关器用于在方位方向上处理距离相关的数据。所提出的架构相对于现有架构具有多个优点,例如不需要大的存储器需求,没有显式的范围迁移校正电路,有效的处理以及较少数量的VLSI芯片。这项研究讨论了通过对接收的目标方位相位历史进行下采样来降低数据速率的可能性。结果表明,对相位历史进行下采样可以提高点目标之间的空间分辨率。下采样和时域相关器有助于SAR数据的实时成像。还给出了每个处理块上给定灰度分辨率的位宽要求标准。还讨论了能够对点目标成像的模拟器。

著录项

  • 作者

    Premkumar, A. Benjamin.;

  • 作者单位

    University of Idaho.;

  • 授予单位 University of Idaho.;
  • 学科 Engineering Electronics and Electrical.
  • 学位 Ph.D.
  • 年度 1990
  • 页码 162 p.
  • 总页数 162
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类 无线电电子学、电信技术;
  • 关键词

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