The first objective of this thesis is to evaluate the performance of three popular FPGA architectures, namely Actel ACT-1, Altera EPM5000, and Xilinx XC3000. This evaluation is carried out by comparing the speed of benchmark circuits implemented on these three architectures. The results indicate that the performance of the Altera EPM5000 architecture is inferior to both Actel ACT-1 and Xilinx XC3000, due to the poor performance of its logic block and its routing architecture. The second result of the comparison shows that the performance of Actel and Xilinx is very similar. Actel has a slow routing architecture, due to the high routability of the array and due to the programming technology used, but it has a fast logic block due to its low complexity. The Xilinx architecture has a fast routing architecture, whose good performance compensates for the poor performance of its logic block.;The second objective of this thesis is to determine if the performance of the Actel FPGA can be improved by introducing a routing scheme similar to the direct interconnect of Xilinx XC3000 architecture. This routing feature provides a fast, dedicated interconnection between adjacent logic blocks. In order to evaluate the gain brought by the new routing scheme, a delay model of the Actel FPGA is presented and validated. Results, using two benchmark circuits, show that the gain in performance is 9 and 12 percent. However, the cost, in terms of the silicon area used is estimated as 63 percent.
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