Analog and mixed-signal DFT using wideband undersampling.

摘要

Integrated Circuit (IC) design and manufacturing technology is growing rapidly. Advances in IC processes provide systems that operate at high speed with increasingly more complex circuits on a silicon die. Most analog IC testing is simple go/no-go based testing which can not be used for high speed devices and is becoming inadequate for complex ICs.; A high frequency analog IC testing technique using a periodic input stimuli and a sequential undersampling algorithm has been developed at the University of Regina. This algorithm overcomes many of the loading problems associated with high speed analog signal testing. The utility of the undersampling technique was shown in the previous work conducted at the University of Regina using a NORTEL 1.2{dollar}mu{dollar}m process prototype IC. This thesis expands that work by improving the performance of the original sampling circuits, investigating the possibility of generating control signals on-chip to reduce test cost, and developing a structured analog Design For Testability (DFT) approach. This approach can be used for high speed testing and is based upon wideband undersampling technique similar to those used in sampling oscilloscope and mixed-signal testers. (Abstract shortened by UMI.)