Low power receiver design for portable RF applications: Design and implementation of an adaptive multiuser detector for an indoor, wideband CDMA application

摘要

This thesis investigates the design of high performance, low-power receivers for wideband, indoor, portable RF applications. The primary goal is to identify suitable architectures, algorithms, and implementations for these types of wireless systems. Four key enabling technologies are investigated in this work: integrated circuit fabrication, low-power circuit design, advanced digital signal processing, and multiuser communication theory. Opportunities for convergence in these four areas are considered, and "digital radio" architectures are presented as a principal means to exploit this anticipated convergence.;An extended design example serves to illustrate the benefits of a digital radio approach. The target application is an indoor, wideband, direct-sequence CDMA (DS-CDMA) system providing wireless multimedia access. The portable receiver is designed to operate at data rates up to 3.3 Mbps (25 MHz chip rate) with a carrier frequency of 1.96 GHz. A two-chip integrated CMOS receiver implementation is proposed, specified, and discussed. One chip implements all of the required analog RF and analog baseband functions; the other implements all of the necessary digital signal processing. More specifically, the digital baseband portion of the receiver uses adaptive multiuser detection techniques to suppress interference and achieves multiple order of magnitude improvements in bit error rate performance compared to conventional designs. Despite the added complexity of this approach, the digital baseband IC is projected to consume less than 20 mW of power (from a 1V supply) and to occupy less than 5 mm2 of die area (using an 0.25 m m CMOS process).;Prior to this work, multiuser detection techniques have been considered primarily for base station applications only, because of complexity constraints. This thesis argues that low-power circuit techniques, coupled with judicious system, architectural, and algorithmic design choices permits realization of the required signal processing at the portable unit also, even under severe size and power restrictions.