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Enabling Runtime Profiling to Hide and Exploit Heterogeneity within Chip Heterogeneous Multiprocessor Systems (CHMPS).

机译:使运行时分析可以隐藏和利用芯片异构多处理器系统(CHMPS)中的异构性。

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摘要

The heterogeneity of multiprocessor systems on chip (MPSoC) has presented unique opportunities for furthering today's diverse application needs. FPGA-based MPSoCs have the potential of bridging the gap between generality and specialization but has traditionally been limited to device experts. The flexibility of these systems can enable computation without compromise but can only be realized if this flexibility extends throughout the software stack. At the top of this stack, there has been significant effort for leveraging the heterogeneity of the architecture. However, the betterment of these abstractions are limited to what the bottom of the stack exposes: the runtime system.;The runtime system is conveniently positioned between the heterogeneity of the hardware, and the diverse mix of both programming languages and applications. As a result, it is an important enabler of realizing the flexibility of an FPGA-base MPSoC. The runtime system can provide the abstractions of how to make use of the hardware. However, it is also important to know when and which hardware to use. This is a non-issue for a homogeneous system, but is an important challenge to overcome for heterogeneous systems.;This thesis presents a self-aware runtime system that is able to adapt to the application's hardware needs with a runtime overhead that is comparable to a naive approach. It achieves this through a combination of pre-generated offline data, and the utilization of runtime data. For systems with diminishing hardware, the results confirmed that the runtime system provided high resource efficiency. This thesis also explored different runtime metrics that can affect the application on a heterogeneous system and offers concluding remarks on future work.
机译:多处理器片上系统(MPSoC)的异构性为满足当今多样化的应用需求提供了独特的机会。基于FPGA的MPSoC具有弥合通用性与专业性之间差距的潜力,但传统上仅限于设备专家。这些系统的灵活性可以在不影响性能的情况下进行计算,但是只有在这种灵活性扩展到整个软件堆栈的情况下才能实现。在此堆栈的顶部,已进行了大量工作来利用体系结构的异构性。但是,这些抽象的改进仅限于堆栈底部所暴露的内容:运行时系统。运行时系统位于硬件的异构性与编程语言和应用程序的多种混合之间。因此,它是实现基于FPGA的MPSoC灵活性的重要推动者。运行时系统可以提供有关如何使用硬件的抽象。但是,知道何时以及使用哪种硬件也很重要。对于同构系统这不是问题,但对于异构系统则是要克服的重要挑战。;本文提出了一种具有自我感知能力的运行时系统,该系统能够以与应用程序硬件相当的运行时开销来适应应用程序的硬件需求天真的方法。它通过组合预先生成的脱机数据并利用运行时数据来实现此目的。对于硬件递减的系统,结果证实了运行时系统提供了很高的资源效率。本文还探讨了可能影响异构系统上的应用程序的不同运行时指标,并提供了有关未来工作的结论。

著录项

  • 作者

    Cartwright, Eugene.;

  • 作者单位

    University of Arkansas.;

  • 授予单位 University of Arkansas.;
  • 学科 Computer engineering.;Computer science.
  • 学位 Ph.D.
  • 年度 2016
  • 页码 108 p.
  • 总页数 108
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类
  • 关键词

  • 入库时间 2022-08-17 11:48:28

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