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Architectural evaluation of multicluster wide-issue video signal processors.

机译:多集群宽发行视频信号处理器的体系结构评估。

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摘要

Multimedia applications are omnipresent nowadays and they are changing our life and society vastly. As they become more diverse and complex, the computational power required for real-time processing also increases greatly, which raises challenges to microprocessor architecture design. Because few general-purpose processors or traditional Digital Signal Processors (DSPs) can support the extraordinary computing demand generated by aggressive video applications, Video Signal Processors (VSPs) emerge as a solution to accelerate computation-intensive multimedia applications. While dedicated VSPs are available for MPEG-1 and MPEG-2 encoding and decoding, the need for greater functionality and time-to-market pressures will push the video industry towards programmable VSPs.;This thesis provides an overview of the problems involved in VSP design, including the multi-cluster architecture model, register and memory sizing, streaming computation, and so on. Analyses and solutions are also presented in addition to problem formulation. Understanding these problems well will help us realize architectural tradeoffs and pinpoint bottleneck in different stages of design sophistication.;Focusing on video applications, we use H.263, MPEG-2 and MPEG-4 CODECs as our benchmark suite for studying architectural impact on video applications. In the thesis, we first introduce the architectural paradigm of the Princeton VSP, then we study the performance of those video applications on various architectures. We construct a trace-driven simulation framework with an efficient instruction scheduling algorithm and carry out several experiments, including studies on parallelization of video applications, architectural tradeoffs, memory systems, data partitioning schemes, performance estimation, etc. Finally an experimental compiler is presented.;Contributions of this thesis include development of automated tools to schedule complete applications on finely modeled architectures, and analytical comparisons of the impact of various architectural parameters as well as different designs. The results validate both our design methodology and our architectural approach.
机译:如今,多媒体应用无所不在,它们正在极大地改变我们的生活和社会。随着它们变得越来越多样化和复杂,实时处理所需的计算能力也大大增加,这对微处理器体系结构设计提出了挑战。由于很少有通用处理器或传统的数字信号处理器(DSP)能够满足激进的视频应用程序产生的非凡计算需求,因此视频信号处理器(VSP)成为加速计算密集型多媒体应用程序的解决方案。虽然专用的VSP可用于MPEG-1和MPEG-2编码和解码,但是对更大功能和上市时间的需求将推动视频行业向可编程VSP迈进。本论文概述了VSP所涉及的问题设计,包括多集群体系结构模型,寄存器和存储器的大小确定,流计算等。除提出问题外,还提供分析和解决方案。很好地理解这些问题将有助于我们在设计复杂度的不同阶段实现架构折衷并查明瓶颈。针对视频应用,我们使用H.263,MPEG-2和MPEG-4 CODEC作为基准套件,研究架构对视频的影响应用程序。本文首先介绍了普林斯顿VSP的体系结构范例,然后研究了这些视频应用程序在各种体系结构上的性能。我们使用高效的指令调度算法构建跟踪驱动的仿真框架,并进行了一些实验,包括对视频应用程序并行化,体系结构权衡,存储系统,数据分区方案,性能估计等方面的研究。最后,提出了一个实验性编译器。 ;本文的贡献包括开发自动工具,以便在精细建模的体系结构上安排完整的应用程序,并对各种体系结构参数和不同设计的影响进行分析比较。结果验证了我们的设计方法和架构方法。

著录项

  • 作者

    Wu, Zhao.;

  • 作者单位

    Princeton University.;

  • 授予单位 Princeton University.;
  • 学科 Engineering Electronics and Electrical.
  • 学位 Ph.D.
  • 年度 1999
  • 页码 173 p.
  • 总页数 173
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类
  • 关键词

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