Deep sub-micron MOS transistor design and manufacturing sensitivity analysis.

摘要

Advances in both models and simulation platforms in Technology Computer Aided Design (TCAD) have made it possible to perform highly useful predictive studies of deep submicron MOSFETs. These studies can be directed to both the design and optimization of MOSFETs for a given technology, and to a manufacturing sensitivity analysis to obtain a quantitative understanding of the sensitivity of the device electrical parameters to the random structure and doping profile variations anticipated in the manufacturing process. Such results are very useful in both technology and manufacturing tool development.; The first part of this dissertation project was aimed at developing a methodology to efficiently design MOS transistors that satisfy given target structural and electrical specifications. A detailed structural design and analysis was performed in order to identify optimum design parameter regions for a 180nm NMOS transistor for both high performance desktop logic applications and low power applications suitable for portable electronics, for a 180nm PMOS transistor for desktop applications, and finally for a 100nm NMOS transistor. The approach utilizes the device models and simulation tool capabilities that have been previously developed and exist in the Microelectronics Research Center at UT to perform the required analyses and simulations. A set of basic structure and doping profile parameters was identified and utilized in the analysis in anticipation of probable future trends. In order to avoid adverse short-channel characteristics and maximize device performance, two channel engineering options, a halo implant and an anti-punchthrough (APT) implant, were investigated. The intention of the analysis was to maximize I_Dsat while satisfying the off-state leakage criteria and short-channel constraint. In order to view and analyze the results, a design matrix was generated for devices at each of a number of different shallow S/D junction depths, showing both the I_Dsat and ΔV_T (DIBL) values plotted against the halo or APT implant dose and energy. These design matrices provide an understanding of the acceptable regions of device operation for different profile conditions; An important factor for both yield enhancement and process and tool development is an insight into the sensitivity of the electrical performance parameters of the device to the random manufacturing related variations. In this analysis, it is these variations of the nominal structural and doping parameters (inputs) of a transistor that are correlated to the resulting electrical characteristics (responses) of the device. Both a 180nm PMOSFET and a 100nm NMOSFET were designed and optimized to be as representative as possible as intended for use by industry, and were then used as the nominal structure for the analysis. The primary aim of this analysis was to obtain a set of complete, second-order empirical equations relating the random manufacturing variations in the structural and doping parameters of the representative MOSFET to its key device electrical parameters such as saturation and off-state leakage currents, threshold voltage, etc. Nine input parameters such as gate length, gate oxide, channel doping, etc., were varied in accordance with a three-level Box-Behnken design which provides a complete quadratic model. A Monte-Carlo simulator was developed and used to extract the statistical distribution of each of the electrical responses and compare it to a normal distribution that best fit the data.