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System level design techniques for real-time embedded systems.

机译:实时嵌入式系统的系统级设计技术。

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The increasing complexity of real-time embedded systems and stringent time-to-market demands have put more and more pressure on designers. Computer-aided design of such systems at system level has shown to be a promising methodology to mitigate this problem. This dissertation focuses on two important issues in the system-level design: partitioning, and scheduling. The contributions of the dissertation include: (i) A new partitioning methodology which incorporates hierarchical structures for both system functionalities and hardware modules, and can efficiently make trade-offs between the quality of the solutions and the computational cost. An efficient technique is also proposed for evaluating the quality of alternative designs based on the user's preference. (ii) An improved technique, based on utilization bound calculation, is introduced to rapidly check the schedulability of a large number of design alternatives during design exploration. This technique is further extended to take into account communications and precedence constraints among tasks. (iii) An energy efficient heuristic approach for scheduling fixed-priority real-time systems on a variable speed processor, which also produces the minimum constant voltage needed to feasibly schedule the real time systems. To further study the inherent theoretical limitation in terms of energy saving for a variable speed processor executing a fixed-priority real-time system, an optimal approach is also proposed. With the guidance of the optimal schedule, our heuristic approach is shown to be both effective and efficient in saving power/energy compared with other existing approaches. (iv) New techniques and methodologies for scheduling fixed-priority real-time systems with (m, k) constraints, a Quality of Service constraint requiring that at least m out of any k consecutive instances of a certain task must meet their deadlines.; The problems discussed in the dissertation are rather general in real-time embedded system designs, and these methodologies and techniques are important both in theoretical and practical sense.
机译:实时嵌入式系统越来越复杂,上市时间也越来越严格,这给设计人员带来了越来越大的压力。在系统级别对此类系统进行计算机辅助设计已显示出是缓解此问题的一种有前途的方法。本文主要研究系统级设计中的两个重要问题:分区和调度。论文的贡献包括:(i)一种新的分区方法,该方法结合了用于系统功能和硬件模块的分层结构,并可以有效地在解决方案的质量和计算成本之间进行权衡。还提出了一种有效的技术,用于根据用户的偏好评估替代设计的质量。 (ii)引入了一种基于利用率边界计算的改进技术,以在设计探索期间快速检查大量设计替代方案的可调度性。进一步扩展了此技术,以考虑到任务之间的通信和优先级约束。 (iii)一种高效节能的启发式方法,用于在变速处理器上调度固定优先级的实时系统,该方法还产生可行地调度实时系统所需的最小恒定电压。为了进一步研究执行固定优先级实时系统的变速处理器在节能方面的内在理论限制,还提出了一种优化方法。在最佳计划的指导下,与其他现有方法相比,我们的启发式方法在节省功率/能源方面被证明是行之有效的。 (iv)用于调度具有( m,k )约束的固定优先级实时系统的新技术和方法,服务质量约束要求至少有 m 个某个任务的任何 k 连续实例都必须在截止日期之前完成;本文所讨论的问题在实时嵌入式系统设计中相当普遍,这些方法和技术在理论和实践上均具有重要意义。

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