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RFIC Design for High-Speed Optical and Multigigabit Wireless Communication Systems.

机译:高速光和千兆位无线通信系统的RFIC设计。

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摘要

In this dissertation, high-speed and high-frequency millimeter-wave circuit techniques are introduced for silicon integrated circuit processes. A transimpedance limit for multistage transimpedance amplifiers (TIAs) is derived and applied to a bandwidth enhancement technique using inductive-series pi networks. A 40-Gb/s TIA is demonstrated in a 0.13 mum CMOS process and achieves a transimpedance gain of 50 dBO with a 3-dB bandwidth of 29 GHz.;A low-power optical front-end is implemented in a 45-nm silicon-on-insulator (SOI) CMOS process. The modulator driver uses floating body devices to generate a voltage swing of more than 2 Volts. The optical receiver exhibits a transimpedance exceeding 55-dB˙O over 30 GHz and consumes only 9 mW from a 1 V supply.;Next, a 160-Gb/s amplifier is realized with stagger-tuned stages that are equalized for high bandwidth and low gain ripple. The staggered response is demonstrated with a Darlington feedback amplifier and a constructive wave amplifier. The broadband amplifier is implemented in a 0.12-¦Im Silion-Germanium (SiGe) BiCMOS process and achieves a gain of 10 dB and 3-dB bandwidth of 102 GHz. In contrast, a 45-nm SOI CMOS, cascode distributed amplifier exhibits 9-dB gain over a 3-dB bandwidth of 92 GHz.;In the second part of this dissertation, millimeter-wave circuit design techniques for wireless communication systems are presented. Constructive wave amplification is shown to amplify forward traveling waves along a single transmission line. A 0.12-mum SiGe BiCMOS constructive wave amplifier achieves more than 37.5-dB gain with a 3-dB bandwidth of 14.6 GHz and, consequently, demonstrates a gain-bandwidth product as high as 1,095 GHz.;A Q-band (40∼45 GHz) bidirectional transceiver is demonstrated that eliminates the need for transmit/receive switches with a novel PA/LNA circuit. The transmitter Psat is 9.5 dBm while the receiver noise figure is 4.7 dB.;Finally, using the constructive wave amplifier technique, a W-band, bidirectional constructive wave amplifier is demonstrated to allow amplification in one of two directions. The amplifier has a peak gain of 16 dB and tuned between 77 and 94 GHz.
机译:本文针对硅集成电路工艺,介绍了高速,高频毫米波电路技术。推导了用于多级跨阻放大器(TIA)的跨阻限值,并将其应用于使用感应串联pi网络的带宽增强技术。在0.13微米CMOS工艺中演示了40 Gb / s的TIA,可实现50 dBO的跨阻抗增益和29 GHz的3 dB带宽;在45 nm的硅片中实现了低功耗光学前端绝缘体上(SOI)CMOS工艺。调制器驱动器使用浮体器件产生大于2伏的电压摆幅。光接收器在30 GHz的频率下呈现出超过55 dB O的跨阻,从1 V电源消耗的功率仅为9 mW。接着,实现了160 Gb / s放大器,具有交错调谐的级,可以均衡高带宽和高带宽。低增益纹波。达林顿反馈放大器和相长波放大器演示了交错响应。该宽带放大器以0.12-μm的硅锗锗(SiGe)BiCMOS工艺实现,可实现10 dB的增益和102 GHz的3 dB带宽。相比之下,一个45 nm SOI CMOS共源共栅分布式放大器在92 GHz的3 dB带宽上具有9 dB的增益。在本论文的第二部分,介绍了用于无线通信系统的毫米波电路设计技术。示出了建设性波放大以放大沿着单个传输线的前向行波。一个0.12微米的SiGe BiCMOS构造波放大器以14.6 GHz的3 dB带宽实现了超过37.5 dB的增益,因此展示了高达1,095 GHz的增益带宽乘积; Q波段(40〜45演示了GHz)双向收发器,无需使用新颖的PA / LNA电路进行发射/接收开关。发射器Psat为9.5 dBm,而接收器噪声系数为4.7 dB。最后,使用构造波放大器技术,展示了一种W波段双向构造波放大器,可以在两个方向之一上进行放大。该放大器的峰值增益为16 dB,并在77至94 GHz之间进行调谐。

著录项

  • 作者

    Kim, Joohwa.;

  • 作者单位

    University of California, San Diego.;

  • 授予单位 University of California, San Diego.;
  • 学科 Engineering Electronics and Electrical.
  • 学位 Ph.D.
  • 年度 2011
  • 页码 206 p.
  • 总页数 206
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类
  • 关键词

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